M-Vision 1000 Technical Summary

M-Vision 1000

Technical Summary

Introduction
Architecture
Camera Support
Synchronized Options
Development Environments

I. INTRODUCTION
The M-Vision 1000 (MV-1000) is a monochrome video digitizer board, which can be plugged into the PCI (Peripheral Component Interconnect) bus. The MV-1000 Product line includes a base board with analog camera support, a Memory Expansion module (MV-1200), and a group of specialized acquisition plug-in modules. In this latter group the Digital Camera Interface module (MV-1100), RGB Color Module (MV1300), and NTSC/PAL-Y/C Color Module (MV1350) are available. This Technical Summary describes the MV-1000, MV-1100, and MV-1200 products.

The MV-1000 Video Capture Board digitizes standard or non-standard analog camera video into 8 bits per pixel at rates up to 40 million samples per second. An optional 10 bit version is available for ultra high quality video applications. The digitized video is stored in on-board VRAM. The 1 Mbyte board memory can be expanded to 4 Mbytes with the optional MV-1200 Memory Expansion Module. The on-board VRAM is organized as a continuous memory array. The maximum line width that can be digitized is 8K eight bit pixels.

PCI Bus
The MuTech M-Vision 1000 frame grabber is a full sized PCI bus circuit board. The PCI bus has a number of distinct architectural advantages that benefit video image capture when working at high frame rates, high spatial resolution, or high color resolution. These advantages are most clearly understood when contrasted to the alternative PC bus solutions - the ISA bus and the VL-Bus.

The PCI bus can transfer data at rates up to 130 Mbytes per second. This is significantly faster than the ISA bus (1 to 2 Mbytes per second) and the VL-Bus. The PCI bus can run at 33 MHz without contending with the system processor or other high speed peripherals, such as SCSI disk controllers.

The PCI bus is also truly platform independent, and is no longer rigidly associated with a "PC" containing an Intel processor. Digital Equipment Corporation is offering a Alpha processor based workstation with a PCI bus. Apple is offering the PCI bus on a Power PC based workstation.

It is important to note that the capabilities of any particular PCI bus are dependent on the hardware vendor's motherboard implementation. Some inadequate PCI bus implementations run at speeds far short of the practical maximums.

On a suitably configured Pentium processor PC the MuTech M-Vision 1000 is capable of transferring data to PC or VGA memory at up to 55 Mbytes per second.

Plug and Play
One of the most important feature requirements that factored into the design of the PCI bus specification was that a PCI card should be able to be added to a PC without having to resolve the memory, IO base, and IRQ conflicts that characterize ISA bus cards. As a PCI bus device, the MV-1000 is truly plug and play. This means the board memory and registers are all automatically assigned their addresses at system boot-up by the system BIOS. So is the IRQ number of MV-1000 board.

Master vs. Slave Modes
The M-Vision 1000 takes advantage of another major capability and advantage of the PCI specification. It can run in master mode. Master mode is when the circuit board controls the bus and is allowed to make direct memory transfers to other peripherals (notably VGA cards and disk controllers) without CPU intervention.

Transfer Rates Required to Support Real Time Displays of 8 bit Monochrome Video
Resolution	640x480 30fps	768x575 25fps	1024x1024 30fps
Mbytes/Sec	9.2	11.1	31.5

Only a card like the M-Vision 1000 capable of operating in master mode can achieve data transfer rates of up to 55 Mbytes per second. Circuit boards limited to normal slave mode operation are limited to lower speeds.

II. ARCHITECTURE
VGA Display
The M-Vision 1000 is compatible with all types of VGA display controllers and display drivers. Display drivers may use any size color palette or spatial resolution. Note, to reach the highest transfer speed, it is recommended to use the display pixel depth matching the MV-1000 pixel depth.

The following illustration shows the MV-1000 architecture. The base board provides all circuits needed to digitize standard and non-standard analog video. To accept digital video, the MV-1100 is required. To digitize color video, either the RGB Color Module (MV-1300) or the NTSC/PAL Color Module (MV-1350) is needed.

The different types of sync signals (composite, separate, external trigger, etc.) can be selected through groups of jumpers. A programmable PLL/Clock Generator produces a very high quality pixel clock for A/D conversion as well as for the rest of the board's circuits. The selected video passes through the Conditioning Block for optional filtering and clamping, then goes to the A/D Converter. The band limiting filter is programmable at different cutoff frequencies between 5 MHz and 20 MHz.

The digitized video signal (8 or 10 bits per pixel) is packed into 4 pixels (or 2 pixels) per 32 bit data unit. The packed data units are stored into the on-board VRAM buffer under the control of the Capture Controller which makes sure that only the data from the user specified Grab Window is being stored in the VRAM.

The data stored in the VRAM is available to the PCI bus host through data LUTs. The LUTs have multiple banks selectable through registers.

The PCI bus interface is fully compliant with the PCI Specification Rev 2.1. All on-board memory and registers are mapped into 8 Mbytes in the PCI's 32 bit address space. The MV-1000 supports single and burst memory read/write to any PCI destination address. The PCI configuration information is available during system boot up.

Other blocks provided on the MV-1000 board are the Daughter Card Interface, the Memory Expansion Connector, and the Programmable Sync Generator. A daughter card with 3 Mbytes of VRAM (MV-1200) can be directly plugged into the Memory Expansion Connector. Another Daughter Card Interface can be used to receive digital data (32 bits) as well as sync/control signals from the MV-1100 or MV-1300/1350 option module. The on-board Programmable Sync Generator can be used to generate standard/non-standard drive signals which can be used to sync cameras.

DB9 Inputs
The MV-1000 base board has 7 inputs available on the DB-9 connector if the VC-7 Video Cable is used. All video inputs are AC coupled by default. However, the user can change a jumper to accept a DC coupled signal. A software controlled analog mux selects one of 4 video input signals. The selected video signal is passed to the clamping circuit for DC restoration.

C. Sync & Clock Generator
The task of these blocks is to provide timing signals needed for video digitizing and capture control.

The Sync Stripper generates Composite Sync, Vertical Sync, and Field Signals from either composite video to composite sync input. The Phase Lock Loop takes the reference signal and generates the system clock based on software control. The clock is then sent to the A/D converter and other control blocks as the main system clock.

The PLL is capable of generating a stable clock based on one of the references selected by the Reference Selector. The possible references are C. Sync from the Sync Stripper, the External H. Sync, the External Pixel clock, and the on-board crystal clock.

When the references selected are C. Sync, External H. Sync, or External Pixel Clock, the PLL is able to lock to each of them and generate the system pixel clock with a jitter in the 5 ns range (depending on a stable reference). The PLL is designed to work in the clock frequency range of 5 MHz to 40 MHz. It can lock to the line rate between 5 KHz and 64 KHz.

If the reference selected is the on-board crystal clock (frequency=14.31818 MHz), the generated clock will be in the range between 5 MHz and 40 MHz. The specific frequency is controlled by the software. This clock is sent to the on-board Timing Generator which, under software control, generates required H. Drive and V. Drive. These signals can be configured (by jumpers) in the Input Selection Block to drive the camera. If desired, a divided by 4 clock can be used in Timing Generation. This is useful in very low rate scanning.

Video Conditioning
The Video Conditioning Circuitry is composed of a Band Limiting Filter, a Video Clamping Circuit, and Video Amplifier.

The video signal selected by the Video Mux is passed to a Band Limiting Low Pass Filter. This filter is programmable and has a cut-off frequency range of 5.5 MHz to 20 MHz. A low pass filter before the A/D will usually reduce the aliasing artifact as well as the noise in the digitized video. If the user desires, the band limit filter can be bypassed through a jumper.

The filtered video is DC restored by a clamping circuit. The clamp level is controlled by a DAC. The DC restored signal is amplified by a gain of +2 and sent to the 8 bit A/D converter (optionally 10 bit A/D). Two DACs are used to control the top and bottom reference levels of the A/D converter. Together with the clamp level control, the 3 DACs give the user full control of digitizing any part of the video signal.

The entire video channel is carefully designed to provide a 3 dB bandwidth >20 MHz and to have a signal to noise ratio of 54 dB.

Data Packing Block
The block is formed by a group of registers. Its main function is to pack the pixel data (with different depths) into 32 bit double words before storing them to video RAM.

In the case where 8 bit A/D is used, the packer takes four 8 bit pixels and packs them into one double word (The first pixel is put in the least significant byte). Then the double word is stored in VRAM.

For the users who use the 10 bit A/D option, the packer can be controlled by software to generate 10 bit pixels or 8 bit pixels. The 10 bit pixels are packed as two pixels per 32 bit double word (with the first pixel in the least significant word). The pixel occupies the least significant 10 bits in the 16 bit word. The upper 6 bits are not used. The 8 bit pixels can be generated by shifting down the 10 bit digitized data by 2 bits, then packing them into the same 4 pixels per 32 bit double word format as in the 8 bit A/D case.

Memory
The MV-1000 has either 1 Mbyte or 4 Mbytes of Video RAM (with the optional MV-1200 memory upgrade). Using the M-Vision development library, the application programmer may flexibly configure the board's memory to handle different frame sizes, number of pixels per line, and number of bits per pixel. Because video may be directed to different locations in memory, it is possible to capture and buffer multiple sequential frames.

For example, the M-Vision could capture a 2048 x 2048 by 8 bit frame, a 8192 pixel line, or a 1024 x 1024 by 16 bit pixel (with the optional MV-1200 memory upgrade).

VRAM Organization
In all cases the memory of the MV-1000 is organized as a 1 dimensional array. During digitization, the video data is always packed into double words (32 bits) and sequentially stored in VRAM. The position of the first pixel can be specified as an offset into the 1 dimensional array. There is no gap in storage between the last pixel of line N and the first pixel of line N+1. The memory is used continuously.

Pixel Formats
Depending on the number of bits digitized and the data packing mode, there are basically three different pixel formats in VRAM. They are 8 bits per pixel (with no waste of memory) 10 bits per pixel (wasting 6 bits per pixel) and 12 to 32 bits per pixel (wasting 4 bits per pixel). 12 Bits per pixel is only available using the MV-1100 Digital Camera Interface module.

Note that even when the pixel data is stored in VRAM continuously, the user can always access the pixels in a two dimensional fashion. Functions within the DOS and Windows libraries allow the user to ask for a line of pixels at coordinate (x,y) with a length of dx.

Look Up Tables
The M-Vision 1000 has eight 256 entry 8 bit look up tables (LUTs). These output LUTs will modify the data that is copied from the on-board memory. The LUTs can operate on different sections of memory and can be dynamically switched.

When operating with the 10 bit pixel format option, the lookup tables accept 10 bit input but output 8 bit values.

The host accesses the on-board digital data through the Look Up Tables (LUTs). The LUTs are organized as four physical lanes, each one byte in width, in the path of a 32 bit double word.

The LUTs are addressed by a 32 bit LUT Address Register and loaded with 32 bit data in one write. Each lane of LUTs is a 2K x 8 SRAM and can be used as 8 banks of 256 x 8 LUTs or 2 banks of 1024 x 8 LUTs. The bank selection in either case is controlled by 3 bits (1 bit for 1024 x 8 case) in the LUT Control Register. The LUT configuration is set with jumpers.

III. CAMERA SUPPORT

Product

M-Vision 1000

Module

None

MV-1100

MV-1300

MV-1350>

Camera Type

Mono Analog

Mono Digital

Color Digital

RGB Analog

NTSC/PAL Color Analog

Resolution

RS170

CCIR

Hi Res

RS170

CCIR

Hi Res

NTSC

PAL

Mode

Mono

Color

Mono

Color

Mono

Analog Cameras
The base configuration of the M-Vision 1000 has four analog inputs that will support up to four non-concurrent monochrome RS-170 and CCIR devices.

The M-Vision 1000 has an option to accept 10 bit monochrome analog data. When using this option, the user should pay special attention to minimizing the electrical noise characteristic of PCs and their peripherals.

Digital Cameras
The M-Vision has an optional Digital Camera Interface Module. This option is EIA 422 compliant and allows the board to support up to four concurrent 8 bit digital inputs. This option will accept pixels with 10, 12, 16 up to 32 bits of resolution. However, with the higher resolution, less concurrent inputs are supported.

The Digital Input Module enables the M-Vision 1000 to support most of the popular higher resolution line scan, area scan, and variable scan cameras sold by vendors such as Kodak, Dalsa, EG&G, Pulnix, and Cohu.

Color Support
The M-Vision 1000 will support color cameras in two specific situations: (1) analog RGB color cameras; (2) NTSC/PAL Composite Video or S-Video Color cameras; and (3) digital RGB cameras with no more than 8 bits of resolution per color channel.

Gain & Offset
Both gain and offset levels are set and freely changed by application software.

Frame Options
The M-Vision 1000 will support video devices that output single fields, single frames, and progressive frames.

IV. SYNCHRONIZED OPTIONS
Standard
The M-Vision 1000 supports the most frequently used synchronization methods: (1) video and composite sync, (2) video and separate hsync plus vsync.

Non-Standard
To support a wider range of camera devices, the M-Vision 1000 supports a wide range of non-standard synchronization techniques, including: (1) external trigger, (2) H.Sync and V.Sync, and (3) pixel clock. Pixel clock frequencies may range from 5 to 40 MHz.

The phase lock loop (PLL) has 12 bits of accuracy. PLL jitter is less than 10 nanoseconds (typically less than 5 ns). Pull in time is less than one frame.

Signal Outputs
For cameras that do not provide synchronization, the M-Vision 1000 may be configured to provide any of these synchronization signals: (1) strobe, (2) pixel clock, (3) hsync, and (4) vsync.

Grabbing Controls
The M-Vision 1000 has significant flexibility when grabbing frames. The board may be configured to grab a frames of fields (even or odd field). It can grab progressive frames. It may stop grabbing at the end of a frame or field. It may grab a single frame or field.

Grabbed video data can be placed at an offset address in frame buffer memory. The digitizing window height and width are programmable. Likewise, the size and position of the display window for video is fully programmable.

Operating Software
The M-Vision 1000 is shipped with DOS diagnostics, DOS camera testing programs, and a Windows 3.1 (Window's NT/Windows 95) utility that may be used to acquire live video, snap images, and store images as TIFF, BMP, and Targa files.

Development Tools
The MV-1000 Software Development Kit enables developers and OEMs to program the MV-1000 board and create various applications using the C language. A series of MV-1000 SDKs have been designed and implemented to work under each of the following operating environments:

	MS-DOS, 32 bit object LIB using a DOS extender
	Microsoft Windows 3.0 or later, 16 bit DLL
	Microsoft Windows 95, 16 or 32 bit DLL
	Microsoft Windows NT versions 3.5 or later, 32 bit DLL
	IBM OS-2 Warp

Future releases may support other operating systems/environments

The SDK also provides C header files and sample programs.

Ease of Use
The MV-1000 SDK helps programmers and OEMs to easily set up the frame grabber to work with various types of cameras. The SDK provides a set of built-in configurations for standard or widely used cameras and a group of more than 30 camera configuration files.

Built-in Camera Configurations
The SDK provides a set of standard or widely used camera configurations. A rich set of functional application programs interfaces are provided to accomplish this goal.

The SDK provides pre-determined parameters to set up the MV-1000 so that it will work with the following types of cameras:

	RS-170 (at resolution of 640 by 480)
	CCIR (at resolution of 768 by 575)
	Camera configuration files for many Kodak, Pulnix, Dalsa, Dage, EG&G, DVI, are included.

Camera Configuration File
The SDK does not prevent programmers from manipulating the MV-1000 individual camera control parameters, if desired. With the SDK, you can handle non-standard cameras, fine tune the camera control parameters, or use the advanced features provided by the MV-1000. A camera configuration file can be used for different settings. A camera configuration file is a text file which constrains parameter setting for a particular camera. Application developers and end-users can use any text editor to modify the configuration file.

Image Utility Routines
The SDK includes a group of fine tuned image utility routines. Application developers can use these routines to save grabbed image frames in various image file formats, such as TIFF, TARGA, JPEG, BMP, and/or to display image files.

Sample Program
The SDK comes with sample programs. These source code example programs use many of the features mentioned above and demonstrate the rich functionality and ease of programming using the MV-1000 SD K package.

V. DEVELOPMENT ENVIRONMENT
MS-DOS
The SDK for DOS consists of a LIB file, a set of C include files, and a sample program. The LIB file contains a collection of routines compiled as 32-bit object modules. To access the SDK library, Watcom C/C++ version 10.0 with Rational Systems DOS/4G DOS extender is required. It will generate 32-bit protected mode DOS applications. Rational Systems has made a special version of DOS/4G for Watcom's C/C++ compiler called DOS4GW.EXE, which is shipped with the compiler package.

Microsoft Windows 3.1
There is no special requirement, since the software is provided in DLL format. Any compiler that can generate 16-bit Windows applications should be able to access the DLL.

Microsoft Windows NT & 95
There is no special requirement, since the software is provided in DLL format.

OS/2
Contact MuTech for availability on the OS/2 DLL.

MAC OS
Contact MuTech for availability on the Power MAC Driver.

MuTech Corp. July 1996

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